Abstract - VLSI mixed-signal design provides a tradeoff between the fast and compact but fixed analog implementations of soft computing algorithms and the programmable but bulky and power-hungry digital counterparts. In this paper, a sequentiality study of such systems is performed. Two sequential example processors and the key subsystems for sequential mixed-signal soft computing are described. Feedback from the designed processors and subsystems allowed considering the technology constraints for the sequentiality study and extension to different sequentiality degrees.